Tiles, Sockets, Connectors, Controls

A block diagram illustrating the layout of the TPP3(G2).

The TPP3(G2) features 14 "M" and 14+1 "C" sockets.

Sockets (S1) ~ (S28) form seven standard tiles.

There are 47 control lines connecting "M" sockets to the CPU. The number of control lines is smaller than the number of "M" sockets multiplied by four. This is because some sockets have a reduced number of control lines, or have no lines connected at all:


Additionally:


Jumpers

Four jumpers next to the RJ45 jack define the connection between "M" socket (S27), "C" socket (S28), and the RJ45 jack:


Tiles, Sockets, Connectors, Controls

Jumpers