SPI Read and Write Transactions
As with all SPI communications, transactions start when the –CS line goes LOW and end when the –CS line goes HIGH.
SPI Write Transaction
|
Byte number |
MOSI |
MISO |
|
1 |
&h02 (write opcode) |
--- |
|
2 |
Register address, high byte |
--- |
|
3 |
Register address, low byte |
--- |
|
4 |
Data byte 1 |
--- |
|
5 |
Data byte 2 |
--- |
|
... |
--- |
SPI Read Transaction
|
Byte number |
MOSI |
MISO |
|
1 |
&h03 (read opcode) |
--- |
|
2 |
Register address, high byte |
--- |
|
3 |
Register address, low byte |
--- |
|
4 |
--- |
Data byte 1 |
|
5 |
--- |
Data byte 2 |
|
--- |
... |
Address Auto-Increments
Register address sent in bytes 2 and 3 of every SPI transaction will auto-increment with each data byte send to or received from the FPGA.
This allows you to write or read multiple registers within the span of a single transaction.