PLL Management

PLL is a module of the device that transforms the clock generated by onboard crystal into higher frequency (x8 of the base for Tibbo devices). When the PLL is on, the device runs at 8 times the base frequency, when the PLL is off, the device runs at a "native" frequency of the crystal. Naturally, the device is 8 times faster (and consumes almost as much more power) when the PLL is on.

Not all Tibbo devices have PLLs- to find out if yours does, refer to its platform documentation (for example, EM1000's is here).

When a certain platform supports PLL, it will have a sys.currentpll read-only property and sys.newpll method to control the PLL. Due to the nature of PLL operation it is impossible to switch it on and off while the CPU is executing the firmware. The PLL needs time to "stabilize" its output frequency and it is not safe to let this happen when the CPU is running. Instead, the PLL is toggled when the CPU is in the reset state.

To change PLL mode, request new state through the sys.newpll method, then self-reset the device through the sys.reboot method. After the reboot the device emerges from reset with new PLL state (and PLL frequency already stabilized).

Here is a code example that makes sure that your device is running with PLL off:

** Tibbo Basic **

sub on_sys_init
 if sys.currentpll=YES then
         sys.newpll(OFF)
         sys.reboot
 end if
end sub

External resets- power-up and RST pin reset (reset button reset)- set the PLL to default state (typically ON). On some devices there is a hardware jumper that defines the post-external reset state of the PLL.