Serial Port FIFOs
FIFO (first-in-first-out) is a type of hardware memory that stores the data in a queue fashion. FIFOs are characterized by "depth". For example, 16-byte FIFO can queue up to 16 bytes of data, so it has the depth of 16.
Serial ports usually have two independent FIFOs — one for the outgoing (TX) data, and one for the incoming (RX) data. The TX FIFO allows the system to place a number of bytes into the queue, and then the serial port's hardware will take care of their orderly transmission. The RX FIFO temporarily stores the incoming data until the system gets a chance to process it.
To find out if your device's serial port(s) have FIFOs and what are the depths of these FIFOs, refer to the device's platform documentation (for example, EM1000's is here ).
When the serial port is in the UART/full-duplex/flow control mode (ser.mode = 0- PL_SER_MODE_UART, ser.interface = 0- PL_SER_SI_FULLDUPLEX, and ser.flowcontrol = 1- ENABLED) the device is monitoring its CTS input to see if attached serial device is ready to receive more data. If the CTS state changes to "cannot transmit" the device will stop sending out data immediately. However, the data that has already entered the FIFO will still be sent out. Therefore, after the CTS state becomes "cannot transmit" the device can still send out a number of characters that already went into the transmit FIFO.