Tiles, Sockets, Connectors, Controls

ltpp3g2_layout

The LTPP3(G2) board features eight "M" and eight "C" sockets.

Sockets (S1) through (S15) form four standard tiles.

There are 32 control lines connecting the "M" sockets to the CPU, four for each socket.

"M" sockets (S1), (S5), (S9), and (S13) have the UART capability.

All "M" sockets have the interrupt capability.

Four "M" sockets have SPI/I2C capability.