SPI Read and Write Transactions

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As with all SPI communications, transactions start when the -CS line goes LOW and end when the -CS line goes HIGH.

 

SPI write transaction

Byte number

MOSI

MISO

1

&h02 (write opcode)

---

2

Register address, high byte

---

3

Register address, low byte

---

4

Data byte 1

---

5

Data byte 2

---

 

...

---

 

SPI read transaction

Byte number

MOSI

MISO

1

&h03 (read opcode)

---

2

Register address, high byte

---

3

Register address, low byte

---

4

---

Data byte 1

5

---

Data byte 2

 

---

...

 

Address auto-increments

Register address sent in bytes 2 and 3 of every SPI transaction will auto-increment with each data byte send to or received from the FPGA.

This allows you to write or read multiple registers within the span of a single transaction.